![]() | Name | Last modified | Size | Description |
---|---|---|---|---|
![]() | Parent Directory | - | ||
![]() | Banner.png | 2021-09-22 09:42 | 103K | |
![]() | Card_description.jpg | 2021-09-22 09:42 | 84K | |
![]() | Easy-phi_structure.png | 2021-09-22 09:42 | 182K | |
![]() | EasyPhi_2.JPG | 2021-09-22 09:42 | 156K | |
![]() | EasyPhi_3.JPG | 2021-09-22 09:42 | 138K | |
![]() | Rack_28F_Inside.png | 2021-09-22 09:42 | 363K | |
![]() | back_signals.png | 2021-09-22 09:42 | 472K | |
![]() | backplane.jpg | 2021-09-22 09:42 | 437K | |
![]() | big_rack.JPG | 2021-09-22 09:42 | 203K | |
![]() | control_interface.png | 2021-09-22 09:42 | 482K | |
![]() | easyphi_rack.png | 2021-09-22 09:42 | 546K | |
![]() | easyphi_rack_small.jpg | 2021-09-22 09:42 | 281K | |
![]() | front_panel.png | 2021-09-22 09:42 | 714K | |
![]() | logic_gate_act_det.png | 2021-09-22 09:42 | 61K | |
![]() | logic_gate_board.JPG | 2021-09-22 09:42 | 296K | |
![]() | logic_gate_input.png | 2021-09-22 09:42 | 78K | |
![]() | logic_gate_or_and.png | 2021-09-22 09:42 | 26K | |
![]() | logic_gate_output.png | 2021-09-22 09:42 | 67K | |
![]() | logic_gate_xpoint.png | 2021-09-22 09:42 | 27K | |
![]() | lvpecl.png | 2021-09-22 09:42 | 30K | |
![]() | rack_monitoring.png | 2021-09-22 09:42 | 223K | |
![]() | rack_overview.png | 2021-09-22 09:42 | 417K | |
![]() | rack_schematics.png | 2021-09-22 09:42 | 410K | |
![]() | template.png | 2021-09-22 09:42 | 709K | |
![]() | template_pic_exp.png | 2021-09-22 09:42 | 1.4M | |
![]() | template_princ.png | 2021-09-22 09:42 | 82K | |
![]() | template_schematics.png | 2021-09-22 09:42 | 102K | |
![]() | univ_input_angle.JPG | 2021-09-22 09:42 | 337K | |
![]() | univ_input_top.JPG | 2021-09-22 09:42 | 318K | |
![]() | univinput_dac.png | 2021-09-22 09:42 | 78K | |
![]() | univinput_fpga.png | 2021-09-22 09:42 | 127K | |
![]() | univinput_input.png | 2021-09-22 09:42 | 109K | |